JEDEC JESD82-10A
DEFINITION OF THE SSTU32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007
NACE ASAE-ASABE B11 CGA ICC CTA
DEFINITION OF THE SSTU32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007
POD12-1.2 V Pseudo Open Drain Interface
standard by JEDEC Solid State Technology Association, 08/01/2011
BOARD LEVEL DROP TEST METHOD OF COMPONENTS FOR HANDHELD ELECTRONIC PRODUCTS
standard by JEDEC Solid State Technology Association, 11/01/2016
STANDARD FOR DESCRIPTION OF 2.5 V CMOS LOGIC DEVICES
standard by JEDEC Solid State Technology Association, 11/01/1999
CHIP CARRIER PINOUTS STANDARDIZED FOR CMOS 4000, HC AND HCT SERIES OF LOGIC CIRCUITS
standard by JEDEC Solid State Technology Association, 12/01/1984
LOW TEMPERATURE STORAGE LIFE
standard by JEDEC Solid State Technology Association, 10/01/2015
Low Power Double Data Rate 4 (LPDDR4)
standard by JEDEC Solid State Technology Association, 2014
SILICON RECTIFIER DIODES
standard by JEDEC Solid State Technology Association, 11/01/2002
STEADY-STATE TEMPERATURE HUMIDITY BIAS LIFE TEST
standard by JEDEC Solid State Technology Association, 07/01/2015
ADDENDUM No. 4 to JESD24 – THERMAL IMPEDANCE MEASUREMENTS FOR BIPOLAR TRANSISTORS (DELTA BASE-EMITTER VOLTAGE METHOD)
Amendment by JEDEC Solid State Technology Association, 11/01/1990
CHIP-PACKAGE INTERACTION UNDERSTANDING, IDENTIFICATION AND EVALUATION
standard by JEDEC Solid State Technology Association, 03/01/2009
TERMS, DEFINITIONS, AND LETTER SYMBOLS FOR MICROELECTRONIC DEVICES
standard by JEDEC Solid State Technology Association, 05/01/2007