JEDEC JESD75-5
SON/QFN PACKAGE PINOUTS STANDARDIZED FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
standard by JEDEC Solid State Technology Association, 07/01/2004
NACE ASAE-ASABE B11 CGA ICC CTA
SON/QFN PACKAGE PINOUTS STANDARDIZED FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
standard by JEDEC Solid State Technology Association, 07/01/2004
FIELD-INDUCED CHARGED-DEVICE MODEL TEST METHOD FOR ELECTROSTATIC DISCHARGE WITHSTAND THRESHOLDS OF MICROELECTRONIC COMPONENTS
standard by JEDEC Solid State Technology Association, 10/01/2013
METHODOLOGY FOR THE THERMAL MEASUREMENT OF COMPONENT PACKAGES (SINGLE SEMICONDUCTOR DEVICE)
standard by JEDEC Solid State Technology Association, 12/01/1995
Graphics Double Data Rate (GDDR5X) SGRAM Standard
standard by JEDEC Solid State Technology Association, 08/01/2016
MARKING PERMANENCY
standard by JEDEC Solid State Technology Association, 03/01/2011
EMBEDDED MULTIMEDIACARD (e*MMC) PRODUCT STANDARD, HIGH CAPACITY
standard by JEDEC Solid State Technology Association, 07/01/2007
Inspection Criteria for Microelectronic Packages and Covers
standard by JEDEC Solid State Technology Association, 05/01/2011
STANDARD FOR DESCRIPTION OF 3.3 V NFET BUS SWITCH DEVICES WITH INTEGRATED CHARGE PUMPS
standard by JEDEC Solid State Technology Association, 08/01/2001
TRANSIENT VOLTAGE SUPPRESSOR STANDARD FOR THYRISTOR SURGE PROTECTIVE DEVICE
standard by JEDEC Solid State Technology Association, 11/01/1999
THERMAL RESISTANCE MEASUREMENTS OF CONDUCTION COOLED POWER TRANSISTORS
standard by JEDEC Solid State Technology Association, 10/01/1975
DEFINITION OF THE SSTV32852 2.5 V 24-BIT TO 48-BIT SSTL_2 REGISTERED BUFFER FOR 1U STACKED DDR DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 11/01/2004
TEST METHODS TO CHARACTERIZE VOIDING IN PRE-SMT BALL GRID ARRAY PACKAGES
standard by JEDEC Solid State Technology Association, 09/01/2010