JEDEC JESD 82-29A

DEFINITION OF THE SSTE32882 REGISTERING CLOCK DRIVER WITH PARITY AND QUAD CHIP SELECTS FOR DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V APPLICATIONS
standard by JEDEC Solid State Technology Association, 12/01/2010

JEDEC JESD82-16A

DEFINITION OF THE SSTUA32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY TEST FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007

JEDEC JESD8-25

POD10 – 1.0 V Pseudo Open Drain Interface
standard by JEDEC Solid State Technology Association, 09/01/2011

JEDEC JESD84-B42

MULTIMEDIACARD (MMC) ELECTRICAL STANDARD, HIGH CAPACITY (MMCA, 4.2)
standard by JEDEC Solid State Technology Association, 07/01/2007

JEDEC JESD209-4B

Low Power Double Data Rate 4 (LPDDR4)
standard by JEDEC Solid State Technology Association, 02/01/2017

JEDEC JESD59

BOND WIRE MODELING STANDARD
standard by JEDEC Solid State Technology Association, 06/01/1997

JEDEC JESD22-A100C

CYCLED TEMPERATURE HUMIDITY BIAS LIFE TEST
standard by JEDEC Solid State Technology Association, 10/01/2007

JEDEC JESD219A

Solid-State Drive (SSD) Endurance Workloads
standard by JEDEC Solid State Technology Association, 07/01/2012

JEDEC JEP153A

CHARACTERIZATION AND MONITORING OF THERMAL STRESS TEST OVEN TEMPURATURES
standard by JEDEC Solid State Technology Association, 03/01/2014

JEDEC JESD64-A

STANDARD FOR DESCRIPTION OF 2.5 V CMOS LOGIC DEVICES WITH 3.6 V CMOS TOLERANT INPUTS AND OUTPUTS
standard by JEDEC Solid State Technology Association, 10/01/2000