JEDEC JESD8-30A

POD125 – 1.25 V Pseudo Open Drain I/O
standard by JEDEC Solid State Technology Association, 06/01/2019

JEDEC JEP 122F

FAILURE MECHANISMS AND MODELS FOR SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 11/01/2010

JEDEC JESD8-2

ADDENDUM No. 2 to JESD8 – STANDARD FOR OPERATING VOLTAGES AND INTERFACE LEVELS FOR LOW VOLTAGE EMITTER-COUPLED LOGIC (ECL) INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 03/01/1993

JEDEC JESD 37

STANDARD LOGNORMAL ANALYSIS OF UNCENSORED DATA, AND OF SINGLY RIGHT -CENSORED DATA UTILIZING THE PERSSON AND ROOTZEN METHOD
standard by JEDEC Solid State Technology Association, 10/01/1992

JEDEC JESD51-31

THERMAL TEST ENVIRONMENT MODIFICATIONS FOR MULTICHIP PACKAGES
standard by JEDEC Solid State Technology Association, 07/01/2008

JEDEC JESD 35-1

ADDENDUM No. 1 to JESD35 – GENERAL GUIDELINES FOR DESIGNING TEST STRUCTURES FOR THE WAFER-LEVEL TESTING OF THIN DIELECTRICS
standard by JEDEC Solid State Technology Association, 09/01/1995

JEDEC JESD 482-A (R2002)

LIST OF PREFERRED VALUES FOR USE ON VARIOUS TYPES OF SMALL SIGNAL AND REGULATOR DIODES
standard by JEDEC Solid State Technology Association, 08/01/1984

JEDEC JESD223B

Universal Flash Storage Host Controller Interface (UFSHCI)
standard by JEDEC Solid State Technology Association, 09/01/2013

JEDEC JESD22-A111B

EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IMMERSION OF SMALL SURFACE MOUNT SOLID STATE DEVICES
standard by JEDEC Solid State Technology Association, 03/01/2018