JEDEC JESD 8-11A.01

ADDENDUM No. 11A.01 to JESD8 – 1.5 V +/- 0.1 V (NORMAL RANGE) AND 0.9 – 1.6 V (WIDE RANGE) POWER SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2007

JEDEC JEP156A

CHIP-PACKAGE INTERACTION UNDERSTANDING, IDENTIFICATION AND EVALUATION
standard by JEDEC Solid State Technology Association, 03/01/2018

JEDEC JESD88E

JEDEC Dictionary of Terms for Solid-State Technology, Sixth Edition
standard by JEDEC Solid State Technology Association, 06/01/2013

JEDEC EIA 318-B

MEASUREMENT OF REVERSE RECOVERY TIME FOR SEMICONDUCTOR SIGNAL DIODES
standard by JEDEC Solid State Technology Association, 07/01/1996

JEDEC JESD207

RADIO FRONT END – BASEBAND DIGITAL PARALLEL (RBDP) INTERFACE
standard by JEDEC Solid State Technology Association, 03/01/2007

JEDEC JESD625B

REQUIREMENTS FOR HANDLING ELECTROSTATIC-DISCHARGE-SENSITIVE (ESDS) DEVICES
standard by JEDEC Solid State Technology Association, 01/01/2012

JEDEC JEP116

CMOS SEMICUSTOM DESIGN GUIDELINES
standard by JEDEC Solid State Technology Association, 11/01/1991

JEDEC JESD89-2A

TEST METHOD FOR ALPHA SOURCE ACCELERATED SOFT ERROR RATE
standard by JEDEC Solid State Technology Association, 10/01/2007

JEDEC JEP145

GUIDELINE FOR ASSESSING THE CURRENT-CARRYING CAPABILITY OF THE LEADS IN A POWER PACKAGE SYSTEM
standard by JEDEC Solid State Technology Association, 02/01/2003