JEDEC JESD241

Procedure for Wafer-Level DC Characterization of Bias Temperature Instabilities
standard by JEDEC Solid State Technology Association, 12/01/2015

JEDEC JESD 82-26

DEFINITION OF THE SSTUB32868 REGISTERED BUFFER WITH PARITY FOR 2R x 4 DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007

JEDEC JESD51-10

TEST BOARDS FOR THROUGH-HOLE PERIMETER LEADED PACKAGE THERMAL MEASUREMENTS
standard by JEDEC Solid State Technology Association, 07/01/2000

JEDEC JEP150

STRESS-TEST-DRIVEN QUALIFICATION OF AND FAILURE MECHANISMS ASSOCIATED WITH ASSEMBLED SOLID STATE SURFACE-MOUNT COMPONENTS
standard by JEDEC Solid State Technology Association, 05/01/2005

JEDEC JEP179

DDR2 SPD INTERPRETATION OF TEMPERATURE RANGE AND (SELF-) REFRESH OPERATION
standard by JEDEC Solid State Technology Association, 06/01/2006

JEDEC JESD670A

QUALITY SYSTEM ASSESSMENT
standard by JEDEC Solid State Technology Association, 10/01/2013

JEDEC JESD 36

STANDARD DESCRIPTION OF LOW-VOLTAGE TTL-COMPATIBLE, 5 V TOLERANT CMOS LOGIC DEVICES
standard by JEDEC Solid State Technology Association, 06/01/1996

JEDEC JESD252

SERIAL FLASH RESET SIGNALING PROTOCOL
standard by JEDEC Solid State Technology Association, 10/01/2018

JEDEC JESD25 (R2002)

MEASUREMENT OF SMALL-SIGNAL TRANSISTOR SCATTERING PARAMETERS
standard by JEDEC Solid State Technology Association, 11/01/1972