JEDEC JESD202
METHOD FOR CHARACTERIZING THE ELECTROMIGRATION FAILURE TIME DISTRIBUTION OF INTERCONNECTS UNDER CONSTANT-CURRENT AND TEMPERATURE STRESS
standard by JEDEC Solid State Technology Association, 03/01/2006
NACE ASAE-ASABE B11 CGA ICC CTA
METHOD FOR CHARACTERIZING THE ELECTROMIGRATION FAILURE TIME DISTRIBUTION OF INTERCONNECTS UNDER CONSTANT-CURRENT AND TEMPERATURE STRESS
standard by JEDEC Solid State Technology Association, 03/01/2006
STANDARD FOR THE MEASUREMENT OF CRE
standard by JEDEC Solid State Technology Association, 11/01/1967
Universal Flash Storage (UFS) Host Controller Interface
standard by JEDEC Solid State Technology Association, 08/01/2011
Addendum No. 1 to JESD79-3 – 1.35 V DDR3L-800, DDR3L-1066, DDR3L-1333, and DDR3L-1600
Amendment by JEDEC Solid State Technology Association, 07/01/2010
ADDENDUM No. 2 to JESD24 – GATE CHARGE TEST METHOD
Amendment by JEDEC Solid State Technology Association, 01/01/1991
STANDARD DESCRIPTION OF 1.2 V CMOS LOGIC DEVICES (WIDE RANGE OPERATION)
standard by JEDEC Solid State Technology Association, 06/01/2001
Universal Flash Storage Host Controller Interface (UFSHCI)
standard by JEDEC Solid State Technology Association, 01/01/2018
BOARD LEVEL DROP TEST METHOD OF COMPONENTS FOR HANDHELD ELECTRONIC PRODUCTS
standard by JEDEC Solid State Technology Association, 07/01/2003
3D Chip Stack with Through-Silicon Vias (TSVS): Identifying, Evaluating and Understanding Reliability Interactions
standard by JEDEC Solid State Technology Association, 11/01/2009
Potential Failure Mode and Effects Analysis (FMEA)
standard by JEDEC Solid State Technology Association, 04/01/2012
RESISTANCE TO SOLDER SHOCK FOR THROUGH-HOLE MOUNTED DEVICES
standard by JEDEC Solid State Technology Association, 11/01/2016