JEDEC JEP172
DISCONTINUING USE OF THE MACHINE MODEL FOR DEVICE ESD QUALIFICATION
standard by JEDEC Solid State Technology Association, 07/01/2014
NACE ASAE-ASABE B11 CGA ICC CTA
DISCONTINUING USE OF THE MACHINE MODEL FOR DEVICE ESD QUALIFICATION
standard by JEDEC Solid State Technology Association, 07/01/2014
Handling, Packing, Shipping, and Use of Moisture/Reflow Sensitive Surface-Mount Devices
standard by JEDEC Solid State Technology Association, 04/01/2018
PREFERRED LEAD CONFIGURATION FOR FIELD-EFFECT TRANSISTORS
standard by JEDEC Solid State Technology Association, 11/01/1973
PROCEDURE FOR THE EVQLUQTION OF LOW-k/METAL INTER/INTRA-LEVEL DIELECTRIC INTEGRITY
standard by JEDEC Solid State Technology Association, 07/01/2015
JC-42.6 MANUFACTURER IDENTIFICATION (ID) CODE FOR LOW POWER MEMORIES
standard by JEDEC Solid State Technology Association, 12/01/2014
FAILURE MECHANISMS AND MODELS FOR SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 03/01/2009
Potential Failure Mode and Effects Analysis (FMEA)
standard by JEDEC Solid State Technology Association, 08/01/2018
Graphics Double Data Rate (GDDR5) SGRAM Standard
standard by JEDEC Solid State Technology Association, 02/01/2016
INDEX OF TERMS DEFINED IN JEDEC PUBLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2000
SEMICUSTOM INTEGRATED CIRCUITS (FORMERLY PUBLISHED AS STANDARD FOR GATE ARRAY BENCHMARK SET)
standard by JEDEC Solid State Technology Association, 06/01/1985
ADDENDUM No. 9 to JESD24 – SHORT CIRCUIT WITHSTAND TIME TEST METHOD
Amendment by JEDEC Solid State Technology Association, 08/01/1992
GUIDELINES FOR GaAs MMIC AND FET LIFE TESTING
standard by JEDEC Solid State Technology Association, 12/01/2018